This type of active-“HIGH” decoder can be implemented using just Inverters, ( NOT Gates ) and AND gates. However, there is a limit to the number of inputs that can be used for one particular decoder, because as n increases, the number of AND gates required to produce an output also becomes larger resulting in the fan-out of the gates used to drive them becoming large. Inputs A, B, C are used to select which output on either decoder will be at logic “1” (HIGH) and input D is used with the enable input to select which encoder either the first or second will output the “1”.
Here a much larger 4 (3 data plus 1 enable) to 16 line binary decoder has been implemented using two smaller 3-to-8 decoders.
But a decoder can also have less than 2 n outputs such as the BCD to seven-segment decoder (TTL 7447) which has 4 inputs and only 7 active outputs to drive a display rather than the full 16 (2 4) outputs as you would expect. So for example, a decoder with 3 binary inputs ( n = 3 ), would produce a 3-to-8 line decoder (TTL 74138) and 4 inputs ( n = 4 ) would produce a 4-to-16 line decoder (TTL 74154) and so on.
However, sometimes it is required to have a Binary Decoder with a number of outputs greater than is available, so by adding more inputs, the decoder can potentially provide 2 n more outputs.
We have seen that a 2-to-4 line binary decoder (TTL 74155) can be used for decoding any 2-bit binary code to provide four outputs, one for each possible input combination. Each combination of A, B or C defines a unique memory address. An alternative way of looking at the decoder circuit is to regard inputs A, B and C as address signals. We can say that a binary decoder is a demultiplexer with an additional data line that is used to enable the decoder. Generally a decoders output code normally has more bits than its input code and practical “binary decoder” circuits include, 2-to-4, 3-to-8 and 4-to-16 line configurations.Īn example of a 2-to-4 line decoder along with its truth table is given as: A 2-to-4 Binary Decoders Commonly available BCD-to-Decimal decoders include the TTL 7442 or the CMOS 4028. In other words, a binary decoder looks at its current inputs, determines which binary code or binary number is present at its inputs and selects the appropriate output that corresponds to that binary input.Ī Binary Decoder converts coded inputs into coded outputs, where the input and output codes are different and decoders are available to “decode” either a Binary or BCD (8421 code) input pattern to typically a Decimal output code.
Then we can say that a standard combinational logic decoder is an n-to-m decoder, where m ≤ 2 n, and whose output, Q is dependent only on its present input states. So for example, an inverter ( NOT-gate ) can be classed as a 1-to-2 binary decoder as 1-input and 2-outputs (2 1) is possible because with an input A it can produce two outputs A and A (not-A) as shown.